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HYMD264G726B4M-K - Low Profile Registered DDR SDRAM DIMM

Download the HYMD264G726B4M-K datasheet PDF. This datasheet also covers the HYMD264G726B4M-H variant, as both devices belong to the same low profile registered ddr sdram dimm family and are provided as variant models within a single manufacturer datasheet.

Description

and is subject to change without notice.

Hynix Semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

  • 512MB (64M x 72) Low Profile Registered DDR DIMM based on 64Mx4 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) Error Check Correction (ECC) Capability Registered inputs with one-clock delay Phase-lock loop (PLL) clock driver to reduce loading 2.5V +/- 0.2V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2 interface.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYMD264G726B4M-H_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by SK Hynix

Part Number Description
HYMD264G726B4M-H Low Profile Registered DDR SDRAM DIMM
HYMD264G726B4M-L Low Profile Registered DDR SDRAM DIMM
HYMD264G726B4M-M Low Profile Registered DDR SDRAM DIMM
HYMD264G726B4-H Registered DDR SDRAM DIMM
HYMD264G726B4-K Registered DDR SDRAM DIMM

Full PDF Text Transcription

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64Mx72 bits Low Profile Registered DDR SDRAM DIMM HYMD264G726B(L)4M-M/K/H/L Revision History Revision No. 0.1 0.2 History Defined Target Spec. Defined Cap. Value Draft Date Oct. 2002 Dec. 2003 Remark Preliminary www.DataSheet4U.com This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.2/ Dec. 2003 1 64Mx72 bits Low Profile Registered DDR SDRAM DIMM HYMD264G726B(L)4M-M/K/H/L DESCRIPTION www.DataSheet4U.com Hynix HYMD264G726B(L)4M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays.
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