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HYMD232G726A8M-M - Low Profile Registered DDR SDRAM DIMM

Download the HYMD232G726A8M-M datasheet PDF. This datasheet also covers the HYMD232G726A8M-H variant, as both devices belong to the same low profile registered ddr sdram dimm family and are provided as variant models within a single manufacturer datasheet.

Description

Hynix HYMD232G726A(L)8M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx72 high-speed memory arrays.

Features

  • 256MB (32M x 72) Low Profile Registered DDR DIMM based on 32Mx8 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) Error Check Correction (ECC) Capability Registered inputs with one-clock delay Phase-lock loop (PLL) clock driver to reduce loading 2.5V +/- 0.2V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2.
  • interfa.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYMD232G726A8M-H_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by SK Hynix

Part Number Description
HYMD232G726A8M-H Low Profile Registered DDR SDRAM DIMM
HYMD232G726A8M-K Low Profile Registered DDR SDRAM DIMM
HYMD232G726A8M-L Low Profile Registered DDR SDRAM DIMM
HYMD232G726A8-H Registered DDR SDRAM DIMM
HYMD232G726A8-K Registered DDR SDRAM DIMM

Full PDF Text Transcription

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www.DataSheet4U.com 32Mx72 bits Low Profile Registered DDR SDRAM DIMM HYMD232G726A(L)8M-M/K/H/L DESCRIPTION Preliminary Hynix HYMD232G726A(L)8M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD232G726A(L)8M-M/K/H/L series consists of nine 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD232G726A(L)8M-M/K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition.
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