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HYMD132645L8 - Unbuffered DDR SDRAM DIMM

Download the HYMD132645L8 datasheet PDF. This datasheet also covers the HYMD132645A8 variant, as both devices belong to the same unbuffered ddr sdram dimm family and are provided as variant models within a single manufacturer datasheet.

Description

Hynix HYMD132645A(L)8-K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx64 high-speed memory arrays.

Features

  • 256MB (32M x 64) Unbuffered DDR DIMM based on 16Mx8 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) 2.5V +/- 0.2V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2 interface Fully differential clock operations (CK & /CK) with 100MHz/125MHz/133MHz All addresses and control inputs except Data, Data strobes and Data masks latched on the rising edges of the clock.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYMD132645A8_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by SK Hynix

Part Number Description
HYMD132645A8 Unbuffered DDR SDRAM DIMM
HYMD132645B8-H 32M x 64 bits Unbuffered DDR SDRAM DIMM
HYMD132645B8-K 32M x 64 bits Unbuffered DDR SDRAM DIMM
HYMD132645B8-L 32M x 64 bits Unbuffered DDR SDRAM DIMM
HYMD132645B8-M 32M x 64 bits Unbuffered DDR SDRAM DIMM

Full PDF Text Transcription

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32Mx64 bits Unbuffered DDR SDRAM DIMM HYMD132645A(L)8-K/H/L DESCRIPTION Hynix HYMD132645A(L)8-K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx64 high-speed memory arrays. Hynix HYMD132645A(L)8-K/H/L series consists of sixteen 16Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD132645A(L)8-K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition. Hynix HYMD132645A(L)8-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs.
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