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HY5RS123235FP - 512M (16Mx32) GDDR3 SDRAM

Description

and is subject to change without notice.

Hynix Semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

  • 2.2V +/-0.1V VDD/VDDQ power supply supports 900MHz 2.0V VDD/ VDDQ wide range min/max power supply supports 700/ 800MHz.
  • 1.8V VDD/ VDDQ wide range min/max power supply supports 500 / 600MHz.
  • Single ended READ Strobe (RDQS) per byte Single ended WRITE Strobe (WDQS) per byte Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle.
  • Calibrated output driver Differential.

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Full PDF Text Transcription

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HY5RS123235FP 512M (16Mx32) GDDR3 SDRAM HY5RS123235FP This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.3 / Feb. 2006 1 HY5RS123235FP Revision History Revision No. 0.1 0.2 History Defined target spec.
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