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H5TS5163MFR-NOC - 512Mb DDR3 SDRAM

Description

and is subject to change without notice.

Hynix semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

  • and Ordering Information 1.1.1.

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Full PDF Text Transcription

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H5TQ(S)5163MFR 512Mb DDR3 SDRAM H5TQ(S)5163MFR ** Since DDR3 Specification has not been defined completely yet in JEDEC, this document may contain items under discussion. ** Contents may be changed at any time without any notice. Rev. 1.0 / Oct 2008 This document is a general product description and is subject to change without notice. Hynix semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. 1 Revision History Revision No. History 0.1 Preliminary 0.2 Async/Sync Parameter addition 0.3 1) (sub)Part number change as Hynix New naming system 2) CL change at 800MHz (to 12clock) 0.4 1) 1.8V version insert 2) CL change at 800MHz (to 11clock) 0.5 Typo Change 0.6 Inserted IDD SPEC. 1.0 IDD change H5TQ(S)5163MFR Draft Date Jan.
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