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HI-1573 - (HI-1573 / HI-1574) 3.3V Monolithic Dual Transceivers

Download the HI-1573 datasheet PDF. This datasheet also covers the HI-1574 variant, as both devices belong to the same (hi-1573 / hi-1574) 3.3v monolithic dual transceivers family and are provided as variant models within a single manufacturer datasheet.

Description

The HI-1573 and HI-1574 are low power CMOS dual transceivers designed to meet the requirements of the MIL-STD-1553 specification.

Features

  • ! Compliant to MIL-STD-1553A and B, ARINC 708A ! 3.3V single supply operation ! Smallest footprint available in 7 mm x 7 mm 44- pin plastic chip-scale package (QFN) ! Less than 0.5W maximum power dissipation ! Available in DIP and small outline (ESOIC) package options ! Industrial and extended temperature ranges ! Industry standard pin configurations 44 N/C 43 BUSA 42 BUSA 41 BUSA 40 BUSA 39 VDDA 38 VDDA 37 TXA 36 TXA 35 N/C 34 N/C N/C 1 RXENA 2 GNDA 3 GNDA 4 GNDA 5 VDDB 6 VDDB 7 BUSB 8 BUSB 9.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HI-1574_HoltIntegratedCircuits.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HI-1573
Manufacturer Holt Integrated Circuits
File Size 78.87 KB
Description (HI-1573 / HI-1574) 3.3V Monolithic Dual Transceivers
Datasheet download datasheet HI-1573 Datasheet

Full PDF Text Transcription

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April 2015 HI-1573, HI-1574 MIL-STD-1553 3.3V Monolithic Dual Transceivers DESCRIPTION PIN CONFIGURATIONS The HI-1573 and HI-1574 are low power CMOS dual transceivers designed to meet the requirements of the MIL-STD-1553 specification. The transmitter section of each bus takes complementary CMOS / TTL Manchester II bi-phase data and converts it to differential voltages suitable for driving the bus isolation transformer. Separate transmitter inhibit control signals are provided for each transmitter. The receiver section of the each bus converts the 1553 bus bi-phase differential data to complementary CMOS / TTL data suitable for input to a Manchester decoder. Each receiver has a separate enable input, which forces the receiver outputs to logic "0" (HI-1573) or logic “1” (HI1574).
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