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HD68B21 - Peripheral Interface Adapter

Download the HD68B21 datasheet PDF. This datasheet also covers the HD68A21 variant, as both devices belong to the same peripheral interface adapter family and are provided as variant models within a single manufacturer datasheet.

Features

  • Two Bi-directional 8-Bit Peripheral Data Bus for interface to Peripheral devices Two Programmable Control Registers Two Programmable Data Direction Registers Four Individually-Controlled Interrupt Input Lines: Two Usable as Peripheral Control Outputs Handshake Control Logic for Input and Output Peripheral Operation High-Impedance 3-State and Direct Transistor Drive Peripheral Lines Program Controlled Interrupt and Interrupt Disable Capability CMOS Drive Capability on Side A Peripheral Lines Two.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD68A21-Hitachi.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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HD6821, HD68A21, HD68B21 P I A (Peripheral Interface Adapter) The HD6821 Peripheral Interface Adapter provides the universal means of interfacing peripheral equipment to the HD6800 Microprocessing Unit (MPU)- This device is capable of interfacing the MPU to peripherals through two 8-bit bi-directional peripheral data buses and four control lines. No external logic is required for interfacing to most peripheral devices. The functional configuration of the PIA is programmed by the MPU during system initialization. Each of the peripheral data lines can be programmed to act as an input or output, and each of the four control/interrupt lines may be programmed for one of several control modes. This allows a high degree of flexibility in the over-all operation of the interface.
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