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HD74HC158 - These devices each consist of four 2-input digital multiplexers with common select and strobe inputs

Description

These devices each consist of four 2-input digital multiplexers with common select and strobe inputs.

On the HD74HC157, when the strobe input is at logical “L” the four outputs assume the values as selected from the inputs.

When the strobe input is at a logical “H” the outputs assume logical “L”.

Features

  • High Speed Operation: tpd (Data to Output) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs Strobe H L L L L Select X L L H H A X L H X X B X X X L H Output Y HC157 L L H L H HC158 H H L H L HD74HC157/HD74HC158 Pin Arrangement Select 1 1A 2 Inputs 1B 3 Output 1Y 4 2A 5.

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📁 Similar Datasheet

Part Number Description Manufacturer
HD74HC158 Quad. 2-to-1-line Data Selectors / Multiplexers Renesas
HD74HC151 1-of-8-line Data Selector/Multiplexer Renesas
HD74HC152 1-of-8-line Data Selector/Multiplexer Renesas
HD74HC153 Dual 4-to-1-line Data Selectors/Multiplexers Renesas
HD74HC155 Dual 2-to-4-line Decoders/Demultiplexers Renesas

Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HC151 1 of-8-line Data Selector/Multiplexer
HD74HC152 1-of-8-line Data Selector/Multiplexer
HD74HC153 Dual 4-to-1-line Data Selectors/Multiplexers
HD74HC154 4-to-16-line Decoder/Demultiplexer
HD74HC155 Dual 2-to-4-line Decoders/Demultiplexers

Full PDF Text Transcription

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HD74HC157/HD74HC158 Quad. 2-to-1-line Data Selectors/Multiplexers (with noninverted outputs) Quad. 2-to-1-line Data Selectors/Multiplexers (with inverted outputs) Description These devices each consist of four 2-input digital multiplexers with common select and strobe inputs. On the HD74HC157, when the strobe input is at logical “L” the four outputs assume the values as selected from the inputs. When the strobe input is at a logical “H” the outputs assume logical “L”. The HD74HC158 operates in the same manner, except that its outputs are inverted. Select decoding is done internally resulting in a single select input only. If enabled, the select input determines whether the A or B inputs get routed to their corresponding Y outputs.
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