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NDS356AP - P-Channel Logic Level Enhancement Mode Field Effect Transistor

Datasheet Summary

Description

SuperSOT -3 P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.

This very high density process is especially tailored to minimize on-state resistance.

Features

  • -1.1 A, -30 V, RDS(ON) = 0.3 Ω @ VGS=-4.5 V RDS(ON) = 0.2 Ω @ VGS=-10 V. Industry standard outline SOT-23 surface mount package using proprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. ________________________________________________________________________________ D G S Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source.

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Datasheet Details

Part number NDS356AP
Manufacturer Fairchild
File Size 78.75 KB
Description P-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet download datasheet NDS356AP Datasheet
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September 1996 NDS356AP P-Channel Logic Level Enhancement Mode Field Effect Transistor General Description SuperSOT -3 P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package. TM Features -1.1 A, -30 V, RDS(ON) = 0.3 Ω @ VGS=-4.5 V RDS(ON) = 0.2 Ω @ VGS=-10 V.
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