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NDS351N - N-Channel Logic Level Enhancement Mode Field Effect Transistor

Datasheet Summary

Description

These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.

This very high density process is especially tailored to minimize on-state resistance.

Features

  • 1.1A, 30V. RDS(ON) = 0.25Ω @ VGS = 4.5V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface mount package. ________________________________________________________________________________ D G S Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage T A = 25°.

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Datasheet Details

Part number NDS351N
Manufacturer Fairchild
File Size 75.68 KB
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet download datasheet NDS351N Datasheet
Additional preview pages of the NDS351N datasheet.

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Full PDF Text Transcription

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March 1996 NDS351N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Features 1.1A, 30V. RDS(ON) = 0.25Ω @ VGS = 4.5V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities.
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