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NDC652P - P-Channel MOSFET

Datasheet Summary

Description

These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.

This very high density process is especially tailored to minimize on-state resistance.

Features

  • -2.4A, -30V. RDS(ON) = 0.18Ω @ VGS = -4.5V RDS(ON) = 0.11Ω @ VGS = -10V. Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. ____________________________________________________________________________________________ 4 3 5 2 6 1 Absolute Maximum Ratings Symbol Parameter VDSS VGSS ID PD Drain-Source Voltage Gate-Sou.

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Datasheet Details

Part number NDC652P
Manufacturer Fairchild
File Size 247.81 KB
Description P-Channel MOSFET
Datasheet download datasheet NDC652P Datasheet
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Full PDF Text Transcription

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March 1996 NDC652P P-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package. Features -2.4A, -30V. RDS(ON) = 0.18Ω @ VGS = -4.5V RDS(ON) = 0.11Ω @ VGS = -10V.
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