NC7SP00 Datasheet PDF - Fairchild TinyLogic ULP 2-Input NAND Gate Specs

NC7SP00 - TinyLogic ULP 2-Input NAND Gate

Datasheet Summary

Description

The NC7SP00 is a single 2-input NAND Gate from Fairchild’s Ultra Low Power (ULP) Series of TinyLogic.

Ideal for applications where battery life is critical, this product is designed for ultra low power consumption within the VCC operating range of 0.9V to 3.6V.

Features

s 0.9V to 3.6V VCC supply operation s 3.6V overvoltage tolerant I/O’s at VCC from 0.9V to 3.6V s tPD 3 ns typ for 3.0V to 3.6V VCC 4 ns typ for 2.3V to 2.7V VCC 5 ns typ for 1.65V to 1.95V VCC 6 ns typ for 1.40V to 1.60V VCC 9 ns typ for 1.10V to 1.30V VCC 24 ns typ for 0.90V VCC s Power-off high impedance inputs and outputs s Static Drive (IOH/IOL) ±2.6 mA @ 3.00V VCC ±2.1 mA @ 2.30V VCC ±1.5 mA @ 1.65V VCC ±1.0 mA @ 1.40V VCC ±0.5 mA @ 1.10V VCC ±20 µA @ 0.9V VCC s Uses patented Quiet Series.

Datasheet Details

Part number	NC7SP00
Manufacturer	Fairchild
File Size	306.82 KB
Description	TinyLogic ULP 2-Input NAND Gate
Datasheet	NC7SP00 Datasheet
Additional preview pages of the NC7SP00 datasheet.

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Full PDF Text Transcription

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NC7SP00 TinyLogic ULP 2-Input NAND Gate June 2002 Revised February 2003 NC7SP00 TinyLogic ULP 2-Input NAND Gate General Description The NC7SP00 is a single 2-input NAND Gate from Fairchild’s Ultra Low Power (ULP) Series of TinyLogic. Ideal for applications where battery life is critical, this product is designed for ultra low power consumption within the VCC operating range of 0.9V to 3.6V. The internal circuit is composed of a minimum of inverter stages including the output buffer, to enable ultra low static and dynamic power. The NC7SP00, for lower drive requirements, is uniquely designed for optimized power and speed, and is fabricated with an advanced CMOS technology to achieve best in class speed operation while maintaining extremely low CMOS power dissipation. Features s 0.

Published: May 12, 2005 |