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74LVTH16835 - Low Voltage 18-Bit Universal Bus Driver

General Description

The LVTH16835 consists of 18-bit universal bus drivers which combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes.

Data flow from A to Y is controlled by the output-enable (OE) input.

Key Features

  • s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs source/sink.
  • 32 mA/+64 mA s Latch-up performance exceeds 500 mA Ordering Code: Order Number 74LVTH16835MEA 74LVTH16835MTD Package Number MS56A MTD56 Package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Preliminary 74LVTH16835 Low Voltage 18-Bit Universal Bus Driver May 2000 Revised May 2000 74LVTH16835 Low Voltage 18-Bit Universal Bus Driver with 3-STATE Outputs (Preliminary) General Description The LVTH16835 consists of 18-bit universal bus drivers which combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes. Data flow from A to Y is controlled by the output-enable (OE) input. This device operates in the transparent mode when the latch-enable (LE) input is HIGH. The A data is latched if the clock (CLK) input is held at a HIGH or LOW logic level. If LE is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of the CLK. When OE is HIGH, the outputs are in the high-impedance state.