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74LCXZ16240 - Low Voltage 16-Bit Inverting Buffer/Line Driver

General Description

The LCXZ16240 contains sixteen inverting buffers with 3STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver.

The device is nibble controlled.

Key Features

  • s 5V tolerant inputs and outputs s Guaranteed power up/down high impedance s Supports live insertion/withdrawal s 2.7V.
  • 3.6V VCC specifications provided s 4.5 ns tPD max (VCC = 3.3V), 20 µA ICC max s ±24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Order Number 74LCXZ16240MEA 74LCXZ16240MTD Package Number MS48A MTD48 Package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Preliminary 74LCXZ16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary) February 2000 Revised February 2000 74LCXZ16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary) General Description The LCXZ16240 contains sixteen inverting buffers with 3STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. When VCC is between 0 and 1.5V, the LCXZ16240 is in the high impedance state during power up or power down.