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74ACT373 - Octal Transparent Latch

Download the 74ACT373 datasheet PDF. This datasheet also covers the 74AC373 variant, as both devices belong to the same octal transparent latch family and are provided as variant models within a single manufacturer datasheet.

General Description

The AC/ACT373 consists of eight latches with 3-STATE outputs for bus organized system applications.

The flipflops appear transparent to the data when Latch Enable (LE) is HIGH.

When LE is LOW, the data that meets the setup time is latched.

Key Features

  • s ICC and IOZ reduced by 50% s Eight latches in a single package s 3-STATE outputs for bus interfacing s Outputs source/sink 24 mA s ACT373 has TTL-compatible inputs Ordering Code: Order Number Package Number Package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74AC373-FairchildSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74ACT373 OCTAL D-TYPE LATCH STMicroelectronics
74ACT374 Octal D-Type Flip-Flop STMicroelectronics
74ACT374 Octal D-Type Flip-Flop Philips
74ACT374 OCTAL D-TYPE FLIP-FLOP ON Semiconductor
74ACT374 Octal D-Type Flip-Flops Hitachi Semiconductor

Other Datasheets by Fairchild (now onsemi)

Part Number Description
74ACT374 Octal D-Type Flip-Flop
74ACT377 Octal D-Type Flip-Flop
74ACT323 8-Bit Universal Shift/Storage Register
74ACT399 Quad 2-Port Register
74ACT00 Quad 2-Input NAND Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74AC373 • 74ACT373 Octal Transparent Latch with 3-STATE Outputs November 1988 Revised November 1999 74AC373 • 74ACT373 Octal Transparent Latch with 3-STATE Outputs General Description The AC/ACT373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flipflops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state.