EM428M1644RTA
Features
- Internal Double-Date-Rate architecture with 2 Accesses per clock cycle.
- VDD/VDDQ= 2.5V ±0.2V for (-75 and -6)
- VDD/VDDQ= 2.6V ±0.1V for (-5 )
- 2.5V SSTL-2 patible I/O
- Burst Length (B/L) of 2, 4, 8
- 2,2.5,3 Clock read latency
- Bi-directional,intermittent data strobe(DQS)
- All inputs except data and DM are sampled at the positive edge of the system clock.
- Data Mask (DM) for write data
- Sequential & Interleaved Burst type available
- Auto Precharge option for each burst accesses
- DQS edge-aligned with data for Read cycles
- DQS center-aligned with data for Write cycles
- DLL aligns DQ & DQS transitions with CLK’s
- Auto Refresh and Self Refresh
- 4,096 Refresh Cycles / 64ms
Ordering Information
Description
The EM428M1644RTA is high speed Synchronous graphic RAM fabricated with ultra high performance CMOS process containing 134,217,728 bits which organized as 2Meg words x 4 banks by 16 bits. The 128Mb DDR SDRAM uses a double data rate architecture to acplish...
