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UT54ACTS245 - Ocral Bus Transceiver

Download the UT54ACTS245 datasheet PDF. This datasheet also covers the UT54ACS245 variant, as both devices belong to the same ocral bus transceiver family and are provided as variant models within a single manufacturer datasheet.

General Description

The UT54ACS245 and the UT54ACTS245 are non-inverting octal bus transceivers designed for asynchronous two-way communication between data buses.

The control function implementation minimizes external timing requirements.

Key Features

  • Three-state outputs drive bus line directly radiation-hardened CMOS - Latchup immune High speed www. DataSheet4U. com Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 20-pin DIP - 20-lead flatpack.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (UT54ACS245_ETC.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number UT54ACTS245
Manufacturer Unknown Manufacturer
File Size 68.95 KB
Description Ocral Bus Transceiver
Datasheet download datasheet UT54ACTS245 Datasheet

Full PDF Text Transcription for UT54ACTS245 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for UT54ACTS245. For precise diagrams, and layout, please refer to the original PDF.

UT54ACS245/UT54ACTS245 Radiation-Hardened Octal Bus Transceiver with Three-State Outputs FEATURES Three-state outputs drive bus line directly radiation-hardened CMOS - La...

View more extracted text
ree-state outputs drive bus line directly radiation-hardened CMOS - Latchup immune High speed www.DataSheet4U.com Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 20-pin DIP - 20-lead flatpack DESCRIPTION The UT54ACS245 and the UT54ACTS245 are non-inverting octal bus transceivers designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction control (DIR) inpu