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UT54ACTS191 - Synchronous 4-Bit Up-Down Binary Counters

Download the UT54ACTS191 datasheet PDF. This datasheet also covers the UT54ACS191 variant, as both devices belong to the same synchronous 4-bit up-down binary counters family and are provided as variant models within a single manufacturer datasheet.

General Description

The UT54ACS191 and the UT54ACTS191 are synchronous 4bit reversible up-down binary counters.

Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed.

Key Features

  • Single down/up count control line counters Fully synchronous in count modes Asynchronously presetable with load control www. DataSheet4U. com radiation-hardened CMOS High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (UT54ACS191_ETC.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number UT54ACTS191
Manufacturer Unknown Manufacturer
File Size 87.18 KB
Description Synchronous 4-Bit Up-Down Binary Counters
Datasheet download datasheet UT54ACTS191 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
UT54ACS191/UT54ACTS191 Radiation-Hardened Synchronous 4-Bit Up-Down Binary Counters FEATURES Single down/up count control line counters Fully synchronous in count modes Asynchronously presetable with load control www.DataSheet4U.com radiation-hardened CMOS High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack DESCRIPTION The UT54ACS191 and the UT54ACTS191 are synchronous 4bit reversible up-down binary counters. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed. Synchronous operation eliminates the output counting spikes associated with asynchronous counters.