42S32200 - 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

Datasheet Summary

Description

A0-A10 BA0, BA1 I/O0 to I/O31 CLK CKE CS RAS CAS WE Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command Write Enable I/O19 I/O20 GNDQ I/O21 I/O22 VCCQ I/O23 VCC Vcc GND VccQ GNDQ NC Power Ground Power Sup

Features

Clock frequency: 166, 143 MHz.
Fully synchronous; all signals referenced to a positive clock edge.
Internal bank for hiding row access/precharge.
Single 3.3V power supply.
LVTTL interface.
Programmable burst length.
(1, 2, 4, 8, full page).
Programmable burst sequence: Sequential/Interleave.
Self refresh modes.
4096 refresh cycles every 64 ms.
Random column address every clock cycle.
Prog.

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42S32200 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM by ETC - Datasheet Preview — Datasheet preview – 42S32200

Datasheet Details

Part number	42S32200
Manufacturer	ETC
File Size	0.96 MB
Description	512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
Datasheet	42S32200 Datasheet
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IS42S32200 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM FEATURES • Clock frequency: 166, 143 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single 3.

Published: Apr 1, 2005 |