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1 Megabit (128K x 8-Bit) EEPROM
VCC VSS RES OE CE WE RES A0 A6 Address Buffer and Latch Y Decoder Y Gating I/O Buffer and Input Latch Control Logic Timing High Voltage Generator I/O0 I/O7 RDY/Busy
28C011T
A7 A16
X Decoder
Memory Array
Data Latch
Memory
Logic Diagram
FEATURES:
• 128k x 8-bit EEPROM • RAD-PAK® radiation hardened against natural space radiation • Total dose hardness: - > 100 krad (Si), depending upon space mission • Excellent Single Event Effects: - No Latchup > 120 MeV/mg/cm2 - SEU > 90 MeV/mg/cm2 read mode • Package: - 32-pin RAD-PAK® flat pack package - JEDEC-approved byte-wide pinout • High speed: - 120, 150, and 200 ns maximum access times available • High endurance: - 10,000 cycles/byte, 10-year data retention • Page write mode: - 1 to 128 byte page • Low power
28C011T Datasheet
