M53D64164A - Mobile DDR SDRAM

Product Overview

ESMT

Part number	M53D64164A
Manufacturer	ESMT
File Size	1.18 MB
Description	Mobile DDR SDRAM
Datasheet	M53D64164A Datasheet
Additional preview pages of the M53D64164A datasheet.

JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) No DLL; CLK to DQS is not synchronized. Differential clock inputs (CLK and CLK ) Four bank operation CAS Latency : 2, 3 Burst Type : Sequential and Interleave Burst Length : 2, 4, 8 Special function support - DS (Drive Strength) - Deep Power Down Mode (DPD Mode) M53D64164A (2C) 1M x16 Bit x 4 Banks Mobile DDR SDRAM All inputs except data & DM are sampled at the risin.

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Published: Sep 20, 2018 |