M13S64164A-5TG - 1M x 16 Bit x 4 Banks Double Data Rate SDRAM

Product Overview

ESMT

Part number	M13S64164A-5TG
Manufacturer	ESMT
File Size	1.51 MB
Description	1M x 16 Bit x 4 Banks Double Data Rate SDRAM
Datasheet	M13S64164A-5TG Datasheet
Additional preview pages of the M13S64164A-5TG datasheet.

z JEDEC Standard z Internal pipelined double-data-rate architecture, two data access per clock cycle z Bi-directional data strobe (DQS) z On-chip DLL z Differential clock inputs (CLK and CLK ) z DLL aligns DQ and DQS transition with CLK transition z Quad bank operation z CAS Latency : 2, 2.5, 3 z Burst Type : Sequential and Interleave z Burst Length : 2, 4, 8 z All inputs except data & DM are sampled at the rising edge of the system clock(CLK) z Data I/O transitions on both edges of data strobe.

📁 Similar Datasheet

M13S128168A - Double Data Rate SDRAM (Elite Semiconductor Memory Technology)
M13S2561616A - 4M x 16 Bit x 4 Banks Double Data Rate SDRAM (Elite Semiconductor Memory Technology)
M13S256328A - 2M x 32 Bit x 4 Banks Double Data Rate SDRAM (Elite Semiconductor Memory Technology)
M13S32321A - 256K x 32 Bit x 4 Banks Double Data Rate SDRAM (Elite Semiconductor Memory Technology)
M13 - TECHNICAL SPECIFICATIONS OF SURFACE MOUNT SILICON RECTIFIER (Dc Components)
M1302L - S-band Magnetron (Nisshinbo)
M1325 - Surface Mount Crystal (MTRONPTI)
M132C - CDS OSH & ON/OFF Melody IC (MOSDESIGN)

Other Datasheets by ESMT

Published: Mar 25, 2019 |