Datasheet Details
| Part number | 74AUP2G3404 |
|---|---|
| Manufacturer | Diodes Incorporated |
| File Size | 400.55 KB |
| Description | BUFFER AND INVERTER |
| Datasheet |
 74AUP2G3404 Datasheet
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General Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
The 74AUP2G3404 has one buffer and one inverter.
Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V.
Key Features
- Advanced Ultra Low Power (AUP) CMOS Supply Voltage Range from 0.8V to 3.6V ± 4mA Output Drive at 3.0V Low Static power consumption.
- ICC < 0.9µA CPD = 6pF Typical at 3.6V Low Dynamic Power Consumption Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time. The hysteresis is typically 250mV at VCC = 3.0V.
- IOFF Supports Partial-Power-Down Mode Operation.