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SHM35920-L - System Hardware Manager

Description

SHM 35-Series is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an ARM® Cortex®-M0 CPU.

It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.

Features

  • 32-bit MCU Subsystem.
  • 48 MHz ARM Cortex-M0 CPU with single-cycle multiply.
  • Up to 256 kB of flash with Read Accelerator.
  • Up to 32 kB of SRAM.
  • DMA engine with 32 channels Programmable Analog.
  • Four opamps that operate in Deep Sleep mode at very low current levels.
  • All opamps have reconfigurable high current pin-drive, high-bandwidth internal drive, ADC input buffering, and Comparator modes with flexible connectivity allowing input connections to any pin.
  • Four curr.

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SHM 35-Series: SHM35920-L Family Datasheet System Hardware Manager (SHM) General Description SHM 35-Series is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an ARM® Cortex®-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The SHM 35920-L product family, based on this platform, is a combination of a microcontroller with digital programmable logic, programmable analog, programmable interconnect, secure expansion of memory off-chip, high-performance analog-to-digital conversion, opamps with Comparator mode, and standard communication and timing peripherals. The programmable analog and digital subsystems allow flexibility and in-field tuning of the design.
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