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CY7C441 - Clocked 512 x 9 / 2K x 9 FIFOs

Description

The CY7C441 and CY7C443 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and write interfaces.

Both FIFOs are 9 bits wide.

The CY7C441 has a 512 word by 9 bit memory array, while the CY7C443 has a 2048 word by 9 bit memory array.

Features

  • High-speed, low-power, first-in first-out (FIFO) memories.
  • 512 x 9 (CY7C441).
  • 2,048 x 9 (CY7C443).
  • 0.65 micron CMOS for optimum speed/power.
  • High-speed 83-MHz operation (12 ns read/write cycle time).
  • Low power.
  • ICC=70 mA.
  • Fully asynchronous and simultaneous read and write operation.
  • Empty, Almost Empty, and Almost Full status flags.
  • TTL compatible.
  • Parity generation/checking.
  • Independent.

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📁 Similar Datasheet

Part Number Description Manufacturer
CY7C4421V Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Cypress Semiconductor
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CY7C443 (CY7C441 / CY7C443) Clocked 512 x 9 / 2K x 9 FIFOs Cypress Semiconductor
CY7C401 (CY7C401 - CY7C404) 64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO Cypress Semiconductor
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Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C408A 64 x 8 Cascadable FIFO
CY7C409A 64 x 9 Cascadable FIFO
CY7C419 256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C4221 1 K / 2 K x 9 Synchronous FIFOs
CY7C4231 1 K / 2 K x 9 Synchronous FIFOs

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www.DataSheet4U.com 43 CY7C441 CY7C443 Features • High-speed, low-power, first-in first-out (FIFO) memories • 512 x 9 (CY7C441) • 2,048 x 9 (CY7C443) • 0.65 micron CMOS for optimum speed/power • High-speed 83-MHz operation (12 ns read/write cycle time) • Low power — ICC=70 mA • Fully asynchronous and simultaneous read and write operation • Empty, Almost Empty, and Almost Full status flags • TTL compatible • Parity generation/checking • Independent read and write enable pins • Supports free-running 50% duty cycle clock inputs • Center power and ground pins for reduced noise • Width Expansion Capability • Available in PLCC packages Functional Description The CY7C441 and CY7C443 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and write interfaces.
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