Datasheet4U Logo Datasheet4U.com

CYV15G0401DXB - Quad HOTLink Transceiver

Description

Synchronous LVTTL parallel interface Optional elasticity buffer in receive path Optional phase align buffer in transmit path The CYP(V)15G0401DXB[1] Quad HOTLink II™ Transceiver is a point-to-point or point-to-multipoint communications building block allowing the transfer of data

Features

  • Second-generation HOTLink® technology.
  • Compliant to multiple standards.
  • ESCON, DVB-ASI, fibre channel and gigabit ethernet (IEEE802.3z).
  • CPRI™ compliant.
  • CYV15G0401DXB compliant to SMPTE 259M and SMPTE 292M.
  • 8 B/10 B encoded or 10-bit unencoded data.
  • Quad channel transceiver operates from 195 to 1500 MBaud serial data rate.
  • Aggregate throughput of 12 GB per second.
  • Selectable parity check/generate.
  • Selectable multi-channel bondin.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer

Other Datasheets by Cypress (Infineon)

Part Number Description
CYV15G0402DXB Quad HOTLink SERDES
CYV15G0403DXB Independent Clock Quad HOTLink Transceiver
CYV15G0403TB Independent Clock Quad HOTLink Serializer
CYV15G0404DXB Independent Clock Quad HOTLink Transceiver
CYV15G0404RB Independent Clock Quad HOTLink Reclocking Deserializer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CYP15G0401DXB CYV15G0401DXB Quad HOTLink II™ Transceiver Features ■ Second-generation HOTLink® technology ❐ Compliant to multiple standards • ESCON, DVB-ASI, fibre channel and gigabit ethernet (IEEE802.3z) • CPRI™ compliant • CYV15G0401DXB compliant to SMPTE 259M and SMPTE 292M • 8 B/10 B encoded or 10-bit unencoded data ■ Quad channel transceiver operates from 195 to 1500 MBaud serial data rate ❐ Aggregate throughput of 12 GB per second ■ Selectable parity check/generate ■ Selectable multi-channel bonding options ❐ Four 8-bit channels ❐ Two 16-bit channels ❐ One 32-bit channel ❐ N × 32-bit channel support (inter-chip) ■ Skew alignment support for multiple bytes of offset ■ Selectable input/output clocking options ■ MultiFrame™ receive framer ❐ Bit and byte alignment ❐ Comma or full K28.
Published: |