CYUSB3025
Features
- Latest-generation storage support
- SD3.0/SDXC
- UHS1 SDR50 / DDR50 Master
- e MMC 4.4 Master
- SDIO 3.0 Master
- USB integration
- Certified USB 3.0 and USB 2.0 peripheral: Super Speed (SS), Hi-Speed (HS), and Full-Speed (FS) only)
- Thirty-two physical endpoints
- Integrated transceiver
- Accessory charger adaptor (ACA) support
- Ultra low-power in core power-down mode
- Less than 60 µA with VBATT on and 20 µA with VBATT off
- I2C master controller at 1 MHz
- Selectable input clock frequencies
- 19.2, 26, 38.4, and 52 MHz
- 19.2-MHz crystal input support
- Independent power domains for core and I/O
- 10 × 10 mm, 0.8-mm pitch ball grid array (BGA) package
- 5.099 mm × 4.695 mm × 0.55 mm, with 0.4 mm pitch small footprint wafer-level chip scale package (WLCSP)
Logic Block Diagram
Applications
- USB thumb drives
- Card readers
- Laptop with SD slots
- SD slot in...
