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CY82C597 - 386/486 Green Chip-Set

Description

wait state read/write support.

Features

  • D 160ĆPin single chip PQFP D Supports PC/AT compatible systems at 25/33/40/50 MHz D Supports AMD, Cyrix level 1 writeĆ back CPU D WriteĆBack/WriteĆThrough cache with 32KB/64KB/128KB/256KB/512KB/ 1MB cache size D NonĆcachable memory range support D Full VESA Local Bus support. No PAL needed for VESA master mode D BuiltĆin tag address comparator for lower cost and performance enhancement D Page mode DRAM controller supports mixture of 256KB/512KB/1MB/2MB/ 4MB/16MB devices D Additional DRAM memory.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY CY82C597 386/486 Green Chip Set Features D 160ĆPin single chip PQFP D Supports PC/AT compatible systems at 25/33/40/50 MHz D Supports AMD, Cyrix level 1 writeĆ back CPU D WriteĆBack/WriteĆThrough cache with 32KB/64KB/128KB/256KB/512KB/ 1MB cache size D NonĆcachable memory range support D Full VESA Local Bus support.
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