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CY7C9335 - SMPTE-259M/DVB-ASI Descrambler/Framer-Controller

Description

SMPTE-259M Operation The CY7C9335 is a CMOS integrated circuit designed to decode SMPTE-125M and SMPTE-244M bit-parallel digital characters (or other data formats) using the SMPTE-259M decoding rules.

Features

  • Fully compatible with SMPTE-259M.
  • SMPTE-125M compliant for 4:2:2 component video.
  • SMPTE-244M compliant for 4fsc composite video.
  • Fully compatible with DVB-ASI.
  • Operates from a single +5V or.
  • 5V supply.
  • 100-pin TQFP package.
  • Decodes 10-bit parallel digital streams for any rate from 16.
  • 40 M characters/sec (160.
  • 400 Mbits/sec serial).
  • Operates with CY7B9334 SMPTE HOTLink™ deserializer/receiver.

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Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C9335A SMPTE-259M/DVB-ASI Descrambler/Framer-Controller
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Full PDF Text Transcription

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CY7C9335 SMPTE-259M/DVB-ASI Descrambler/Framer-Controller Features • Fully compatible with SMPTE-259M — SMPTE-125M compliant for 4:2:2 component video — SMPTE-244M compliant for 4fsc composite video • Fully compatible with DVB-ASI • Operates from a single +5V or −5V supply • 100-pin TQFP package • Decodes 10-bit parallel digital streams for any rate from 16−40 M characters/sec (160−400 Mbits/sec serial) • Operates with CY7B9334 SMPTE HOTLink™ deserializer/receiver • X9 + X4 + 1 descrambler and NRZI-to-NRZ decoder may be bypassed for raw data output The inputs of the CY7C9335 are designed to be directly mated to a CY7B9334 HOTLink receiver, which converts the SMPTE-259M compatible high-speed serial data stream into 10-bit parallel characters.
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