Download the CY7C454 datasheet PDF.
This datasheet also covers the CY7C451 variant, as both devices belong to the same (cy7c451 - cy7c454) cascadable colcked fifos family and are provided as variant models within a single manufacturer datasheet.
Description
The CY7C451, CY7C453, and CY7C454 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read
Logic Block Diagram
D0
8
Pin Configurations
INPUT REGISTER
CKW
ENW FLAG/PARITY PROGRAM REGISTER
PLCC/LCC Top View
D0 D1 D2 D3 D4 D5 D6 PARITY
WRITE CONTROL
FLAG LOGIC R
Features
- High-speed, low-power, first-in first-out (FIFO) memories.
- 512 x 9 (CY7C451).
- 2,048 x 9 (CY7C453).
- 4,096 x 9 (CY7C454).
- 0.65 micron CMOS for optimum speed/power.
- High-speed 83-MHz operation (12 ns read/write cycle time).
- Low power.
- ICC=70 mA.
- Fully asynchronous and simultaneous read and write operation.
- Empty, Full, Half Full, and programmable Almost Empty and Almost Full status flags.
- TTL compati.