Datasheet4U Logo Datasheet4U.com

CY7C372I - UltraLogic 64-Macrocell Flash CPLD

Description

The CY7C372i is an In-System Reprogrammable Complex Programmable Logic Device (CPLD) and is part of the FLASH370i™ family of high-density, high-speed CPLDs.

Features

  • 64 macrocells in four logic blocks.
  • 32 I/O pins.
  • Five dedicated inputs including two clock pins.
  • In-System Reprogrammable (ISR™) Flash technology.
  • JTAG interface.
  • Bus Hold capabilities on all I/Os and dedicated inputs.
  • No hidden delays.
  • High speed.
  • fMAX = 125 MHz.
  • tPD = 10 ns.
  • tS = 5.5 ns.
  • tCO = 6.5 ns.
  • Fully PCI compliant.
  • 3.3V or 5.0V I/O operation.
  • Available.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C325 Timing Control Unit Cypress
CY7C340 Multiple Array Matrix High-Density EPLDs Cypress
CY7C342 128-Macrocell MAX EPLDs Cypress
CY7C342B 128-Macrocell MAX EPLDs Cypress
CY7C343 64-Macrocell MAX EPLD Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C371 32-Macrocell Flash CPLD
CY7C371I UltraLogic 32-Macrocell Flash CPLD
CY7C374 128-Macrocell Flash CPLD
CY7C374I 128-Macrocell Flash CPLD
CY7C375 128-Macrocell Flash CPLD

Full PDF Text Transcription

Click to expand full text
USE ULTRA37000™ FOR ALL NEW DESIGNS CY7C372i UltraLogic™ 64-Macrocell Flash CPLD Features • 64 macrocells in four logic blocks • 32 I/O pins • Five dedicated inputs including two clock pins • In-System Reprogrammable (ISR™) Flash technology — JTAG interface • Bus Hold capabilities on all I/Os and dedicated inputs • No hidden delays • High speed — fMAX = 125 MHz — tPD = 10 ns — tS = 5.5 ns — tCO = 6.5 ns • Fully PCI compliant • 3.3V or 5.0V I/O operation • Available in 44-pin PLCC, TQFP, and CLCC packages • Pin-compatible with the CY7C371i Functional Description The CY7C372i is an In-System Reprogrammable Complex Programmable Logic Device (CPLD) and is part of the FLASH370i™ family of high-density, high-speed CPLDs.
Published: |