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CY7C1363D - 9-Mbit Flow-Through SRAM

Datasheet Summary

Description

microprocessors with minimum glue logic.

delay from clock rise is 6.5 ns (133 MHz version).

Features

  • Supports 133 MHz bus operations.
  • 512K × 18 common I/O.
  • 3.3 V.
  • 5% and +10% core power supply (VDD).
  • 2.5 V or 3.3 V I/O power supply (VDDQ).
  • Fast clock-to-output times.
  • 6.5 ns (133-MHz version).
  • Provide high performance 2-1-1-1 access rate.
  • User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synchronous self-timed write.
  • Asynchronous output.

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Datasheet preview – CY7C1363D

Datasheet Details

Part number CY7C1363D
Manufacturer Cypress Semiconductor
File Size 0.96 MB
Description 9-Mbit Flow-Through SRAM
Datasheet download datasheet CY7C1363D Datasheet
Additional preview pages of the CY7C1363D datasheet.

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Full PDF Text Transcription

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CY7C1363D 9-Mbit (512K × 18) Flow-Through SRAM 9-Mbit (512K × 18) Flow-Through SRAM Features ■ Supports 133 MHz bus operations ■ 512K × 18 common I/O ■ 3.3 V – 5% and +10% core power supply (VDD) ■ 2.5 V or 3.3 V I/O power supply (VDDQ) ■ Fast clock-to-output times ❐ 6.5 ns (133-MHz version) ■ Provide high performance 2-1-1-1 access rate ■ User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self-timed write ■ Asynchronous output enable ■ Available in Pb-free 100-pin TQFP package ■ TQFP available with 3-chip enable ■ “ZZ” sleep mode option Functional Description The CY7C1363D is a 3.
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