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CY7C11611KV18 - 18-Mbit QDR II SRAM 4-Word Burst Architecture

Description

The CY7C11611KV18, CY7C11761KV18, CY7C11631KV18, and CY7C11651KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture.

Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array.

Features

  • Functional.

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Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C1161KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture
CY7C1161V18 (CY7C11xxV18) SRAM 4-Word Burst Architecture
CY7C11631KV18 18-Mbit QDR II SRAM 4-Word Burst Architecture
CY7C1163KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture
CY7C1163V18 (CY7C11xxV18) SRAM 4-Word Burst Architecture

Full PDF Text Transcription

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18-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) CY7C11611KV18, CY7C11761KV18 CY7C11631KV18, CY7C11651KV18 ® Features ■ Functional Description The CY7C11611KV18, CY7C11761KV18, CY7C11631KV18, and CY7C11651KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicated data outputs to support read operations and the write port has dedicated data inputs to support write operations.
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