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CY7C107B - 1M x 1 Static RAM

Description

The CY7C107B and CY7C1007B are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit.

Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers.

Features

  • High speed.
  • tAA = 12 ns.
  • CMOS for optimum speed/power.
  • Automatic power-down when deselected.
  • TTL-compatible inputs and outputs Writing to the devices is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A19). Reading from the devices is accomplished by taking Chip Enable (CE) LOW while Write Enable (WE) remains HIGH. Under.

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Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C107 (CY7C107 / CY7C1007) 1M x 1 Static RAM
CY7C1071DV33 32-Mbit (2M x 16) Static RAM
CY7C1079DV33 32-Mbit (4 M x 8) Static RAM
CY7C107D 1-Mbit (1 M x 1) Static RAM
CY7C1006B 256K x 4 Static RAM

Full PDF Text Transcription

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07B CY7C107B CY7C1007B 1M x 1 Static RAM Features • High speed — tAA = 12 ns • CMOS for optimum speed/power • Automatic power-down when deselected • TTL-compatible inputs and outputs Writing to the devices is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A19). Reading from the devices is accomplished by taking Chip Enable (CE) LOW while Write Enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the data output (DOUT) pin. The output pin (DOUT) is placed in a high-impedance state when the device is deselected (CE HIGH) or during a write operation (CE and WE LOW).
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