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CY7C1069AV33 - 2M x 8 Static RAM

Download the CY7C1069AV33 datasheet PDF. This datasheet also covers the CY7 variant, as both devices belong to the same 2m x 8 static ram family and are provided as variant models within a single manufacturer datasheet.

Description

of Read and Write modes.

The input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a Write operation (CE1 LOW, CE2 HIGH, and WE LOW).

Features

  • High speed.
  • tAA = 8, 10, 12 ns.
  • Low active power.
  • 1080 mW (max. ).
  • Operating voltages of 3.3 ± 0.3V.
  • 2.0V data retention.
  • Automatic power-down when deselected.
  • TTL-compatible inputs and outputs.
  • Easy memory expansion with CE1 and CE2 features device is accomplished by enabling the chip (by taking CE1 LOW and CE2 HIGH) and Write Enable (WE) inputs LOW. Reading from the device is accomplished by enabling the chip (CE1.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7-C1069.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C1061DV33 16-Mbit (1 M X 16) Static RAM Cypress
CY7C1061G 16-Mbit (1 M words x 16 bit) Static RAM Cypress
CY7C106D 1-Mbit (256K x 4) Static RAM Cypress
CY7C1006D 1-Mbit (256K x 4) Static RAM Cypress
CY7C1011G 2-Mbit (128K words x 16 bit) Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C1069DV33 16-Mbit (2M x 8) Static RAM
CY7C1069G 16-Mbit (2M words x 8 bit) Static RAM
CY7C1069GE 16-Mbit (2M words x 8 bit) Static RAM
CY7C10612DV33 16-Mbit (1M x 16) Static RAM
CY7C10612G 16-Mbit (1M x 16) Static RAM

Full PDF Text Transcription

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CY7C1069AV33 2M x 8 Static RAM Features • High speed — tAA = 8, 10, 12 ns • Low active power — 1080 mW (max.) • Operating voltages of 3.3 ± 0.3V • 2.0V data retention • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with CE1 and CE2 features device is accomplished by enabling the chip (by taking CE1 LOW and CE2 HIGH) and Write Enable (WE) inputs LOW. Reading from the device is accomplished by enabling the chip (CE1 LOW and CE2 HIGH) as well as forcing the Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. See the truth table at the back of this data sheet for a complete description of Read and Write modes.
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