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CY7C0830AV - (CY7C08xxxV) FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM

Description

The FLEx18™ family includes 512 Kbit, 1 Mbit, 2 Mbit, 4 Mbit, and 9 Mbit pipelined, synchronous, true dual port static RAMs that are high speed, low power 3.3V CMOS.

Two ports are provided, permitting independent, simultaneous access to any location in memory.

Features

  • Functional.

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Datasheet Details

Part number CY7C0830AV
Manufacturer Cypress (Infineon)
File Size 573.06 KB
Description (CY7C08xxxV) FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM
Datasheet download datasheet CY7C0830AV Datasheet

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Other Datasheets by Cypress (Infineon)

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CY7C0830V Synchronous Dual-Port RAM
CY7C0831AV Synchronous Dual-Port RAM
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CY7C0832BV (CY7C08xxxV) FLEx18 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C0837AV, CY7C0830AV CY7C0831AV, CY7C0832AV CY7C0832BV, CY7C0833AV FLEx18™ 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM Features ■ ■ ■ ■ ■ ■ ■ Functional Description The FLEx18™ family includes 512 Kbit, 1 Mbit, 2 Mbit, 4 Mbit, and 9 Mbit pipelined, synchronous, true dual port static RAMs that are high speed, low power 3.3V CMOS. Two ports are provided, permitting independent, simultaneous access to any location in memory. The result of writing to the same location by more than one port at the same time is undefined. Registers on control, address, and data lines allow for minimal setup and hold time. During a Read operation, data is registered for decreased cycle time. Each port contains a burst counter on the input address register.
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