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CY29976 - Multi-Output Zero Delay Buffer

Description

25 SYNC VDDC O 42, 43 40, 41 19, 20 5, 26, 27 52 31 6 7 8 SELA(1,0) SELB(1,0) SELC(1,0) FB_SEL(2:0) VCO_SEL FB_IN PLL_EN REF_SEL TCLK_SEL I I I I I I I I I 2 MR#/OE I PU 14 3 4 17, 22, 28, 33,37, 45, 49 13 1, 15, 24, 30, 35, 39, 47, 51 INV_CLK SCLK SDATA VDDC VDD VSS I I I PU PU PU N

Features

  • Output frequency up to 125 MHz Supports PowerPC , and Pentium processors 12 clock outputs: frequency configurable Configurable Output Disable Two reference clock inputs for dynamic toggling Oscillator or PECL reference input ® ®.
  • Spread spectrum compatible Glitch-free output clocks transitioning 3.3V power supply Pin compatible with SC973X Industrial temperature range:.
  • 40°C to +85°C 52-Pin TQFP package Table 1. F.

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Other Datasheets by Cypress (Infineon)

Part Number Description
CY29972 125-MHz Multi-Output Zero Delay Buffer
CY29973 3.3V 125-MHz Multi-Output Zero Delay Buffer
CY29942 1:18 Clock Distribution Buffer
CY29943 1:18 Clock Distribution Buffer
CY29946 1:10 Clock Distribution Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY29976 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features ■ ■ ■ ■ ■ ■ Output frequency up to 125 MHz Supports PowerPC , and Pentium processors 12 clock outputs: frequency configurable Configurable Output Disable Two reference clock inputs for dynamic toggling Oscillator or PECL reference input ® ® ■ ■ ■ ■ ■ ■ Spread spectrum compatible Glitch-free output clocks transitioning 3.3V power supply Pin compatible with SC973X Industrial temperature range: –40°C to +85°C 52-Pin TQFP package Table 1. Frequency Table[1] VC0_SEL 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 FB_SEL2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 FB_SEL1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 FB_SEL0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 FVCO 8x 12x 16x 20x 8x 12x 16x 20x 4x 6x 8x 10x 4x 6x 8x 10x Note 1.
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