Datasheet Details
| Part number | CY28442 |
|---|---|
| Manufacturer | Cypress (Infineon) |
| File Size | 319.63 KB |
| Description | Clock Generator |
| Datasheet |
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I/O, PU 3.3V LVTTL input for enabling assigned SRC clock (active low) or 100 MHz Serial Reference Clock.
Selectable through CLKREQA# defaults to enable/disable SRCT/C4, CLKREQB# defaults to enable/disable SRCT/C5.
Assignment can be changed via SMBUS register Byte 8.
| Part number | CY28442 |
|---|---|
| Manufacturer | Cypress (Infineon) |
| File Size | 319.63 KB |
| Description | Clock Generator |
| Datasheet |
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| Part Number | Description | Manufacturer |
|---|---|---|
| CY28447 | Clock Generator | ETC |
| CY28400 | 100MHz Differential Buffer | Silicon Laboratories |
| CY28400-2 | 100MHz Differential Buffer | Silicon Laboratories |
| CY28401 | 100MHz Differential Buffer | Silicon Laboratories |
| CY28410 | Clock Generator | SpectraLinear |
| Part Number | Description |
|---|---|
| CY28441 | Clock Generator |
| CY28400 | 100-MHz Differential Buffer |
| CY28401 | 100-MHz Differential Buffer |
| CY28404 | CK409-COMPLIANT CLOCK SYNTHESIZER |
| CY28405 | CK409-Compliant Clock Synthesizer |
The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.