Datasheet4U Logo Datasheet4U.com

CY28439 - Clock Generator

Description

Pin No.

6,56 1,5 3 Name VDD_PCI VSS_PCI FS_E/PCI4 Type PWR GND 3.3V power supply for outputs.

Ground for outputs.

Features

  • Compliant to Intel CK410.
  • Supports Intel Prescott and Tejas CPU.
  • Selectable CPU frequencies.
  • Differential CPU clock pairs.
  • 100-MHz differential SRC clocks (two selectable between Fixed and Overclocking).
  • 96-MHz differential dot clock.
  • 48-MHz USB clocks.
  • 33-MHz PCI clock.
  • Dial-A-Frequency.
  • Watchdog.
  • Two independent overclocking PLLs.
  • Low-voltage frequency select input.
  • I2C suppo.

📥 Download Datasheet

Datasheet preview – CY28439

📁 Similar Datasheet

  • CY28439 - Clock Generator (SpectraLinear)
  • CY28439-2 - Clock Generator (SpectraLinear)
  • CY28437 - Clock Generator (SpectraLinear)
  • CY28400 - 100MHz Differential Buffer (Silicon Laboratories)
  • CY28400-2 - 100MHz Differential Buffer (Silicon Laboratories)
  • CY28401 - 100MHz Differential Buffer (Silicon Laboratories)
  • CY28410 - Clock Generator (SpectraLinear)
  • CY28410-2 - Clock Generator (SpectraLinear)
  • CY28411 - Clock Generator (Silicon Laboratories)
  • CY28411-1 - Clock Generator (SpectraLinear)
Other Datasheets by Cypress Semiconductor

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com PRELIMINARY CY28439 Clock Generator for Intel Grantsdale Chipset Features • Compliant to Intel CK410 • Supports Intel Prescott and Tejas CPU • Selectable CPU frequencies • Differential CPU clock pairs • 100-MHz differential SRC clocks (two selectable between Fixed and Overclocking) • 96-MHz differential dot clock • 48-MHz USB clocks • 33-MHz PCI clock • Dial-A-Frequency • Watchdog • Two independent overclocking PLLs • Low-voltage frequency select input • I2C support with readback capabilities • Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference (EMI) reduction • 3.3V power supply • 56-pin SSOP and TSSOP packages CPU SRC x2 x6 PCI x9 REF DOT96 x2 x1 USB x1 24-48M x1 Block Diagram Xin Xout Pin Configuration VDD_RE F RE F 14.
Published: |