Datasheet4U Logo Datasheet4U.com

CY25822-2 - CK-SSC Spread Spectrum Clock Generator

Description

Pin No.

1 2 3 4 5 6 7 8 Pin Name CLKIN VDD GND CLKOUT REFOUT SDATA SCLOCK PWRDWN# Pin Type Input Power Ground Output Output I/O Input Output Pin Description 48-MHz or 66-MHz Clock Input.

Power Supply for PLL and Outputs.

Features

  • 3.3V operation 48- and 66-MHz frequency support Selectable slew rate control 350-pS jitter I2C programmability 500-µA power-down current Spread Spectrum for best electromagnetic interference (EMI) reduction.
  • 8-pin SOIC package Block Diagram VDD REFOUT CLKOUT (SSCG Output) Clock Input Freq. Divider M Phase Detector Charge Pump Σ VCO Post Dividers SDATA SCLOCK PWRDWN# Logic Control Feedback Divider N Modulati.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY25823 CK-SSCD Spread Spectrum Differential Clock Specification Cypress
CY25200 Programmable Spread Spectrum Clock Generator Cypress
CY25402 Two-PLL Programmable Clock Generator Cypress
CY25403 Three-PLL Programmable Clock Generator Cypress
CY25422 Two-PLL Programmable Clock Generator Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY25811 Spread Spectrum Clock Generator
CY25812 Spread Spectrum Clock Generator
CY25814 Spread Spectrum Clock Generator
CY25818 Spread Spectrum Clock Generator
CY25819 Spread Spectrum Clock Generator

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com CY25822-2 CK-SSC Spread Spectrum Clock Generator Features • • • • • • • 3.3V operation 48- and 66-MHz frequency support Selectable slew rate control 350-pS jitter I2C programmability 500-µA power-down current Spread Spectrum for best electromagnetic interference (EMI) reduction • 8-pin SOIC package Block Diagram VDD REFOUT CLKOUT (SSCG Output) Clock Input Freq. Divider M Phase Detector Charge Pump Σ VCO Post Dividers SDATA SCLOCK PWRDWN# Logic Control Feedback Divider N Modulating Waveform PLL GND Pin Configuration C L K IN 1 VDD 2 8 *P W R D W N # 7 SC LO C K C Y 2 5 8 2 2 -2 GND 3 C LKO U T 4 * 1 5 0 K Ω P u ll-u p 6 SDATA 5 REFOUT Cypress Semiconductor Corporation Document #: 38-07531 Rev.
Published: |