CY241V08A-05 - (CY241V08A-05/-06) MPEG Clock Generator

Description

Document #: 38-07670 Rev.

Pag

Features

Integrated phase-locked loop (PLL).
Low-jitter, high-accuracy outputs.
VCXO with analog adjust.
3.3V operation.
Compatible with MK3727 (.
5,.
6).

Cypress (now Infineon)

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CY241V08A-05 (CY241V08A-05/-06) MPEG Clock Generator by Cypress Semiconductor - Datasheet Preview — Datasheet preview – CY241V08A-05

Datasheet Details

Part number	CY241V08A-05
Manufacturer	Cypress (now Infineon)
File Size	263.39 KB
Description	(CY241V08A-05/-06) MPEG Clock Generator
Datasheet	CY241V08A-05 Datasheet
Additional preview pages of the CY241V08A-05 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com CY241V08A-05,06 MPEG Clock Generator with VCXO Features • Integrated phase-locked loop (PLL) • Low-jitter, high-accuracy outputs • VCXO with analog adjust • 3.3V operation • Compatible with MK3727 (–5, –6) • Application compatibility for a wide variety of designs • Enables design compatibility • Lower drive strength settings (CY241V08A–06) Benefits • Digital VCXO control • Electromagnetic interference (EMI) reduction for standards compliance • Second source for existing designs • Highest-performance PLL tailored for multimedia applications • Meets critical timing requirements in complex system designs CY241V08A–05,–06 Logic Block Diagram 13.

Published: Oct 13, 2006 |