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MPS
6530
MEMORY, I/O, TIMER ARRAY
6530 (MEMORY, I/O, TIMER ARRAY)
DESCRIPTION
The 6530 is designed to operate in conjunction with the 650X Microprocessor Family. It is comprised of a mask programmable 1024 x8 ROM,a 64x8 static RAM, two software controlled 8bit bi-directional data ports allowing direct interfacing between the microprocessor unit and peripheral devices, and a software programmable interval timer with interrupt, capable of timing in various intervals from 1 to 262,144 clock periods.
6530 Datasheet
