CEB6031LS2 - N-Channel Logic Level Enhancement Mode Field Effect Transistor
Chino-Excel Technology
Download the CEB6031LS2 datasheet PDF.
This datasheet also covers the CEB6031LS2_Chino variant, as both devices belong to the same n-channel logic level enhancement mode field effect transistor family and are provided as variant models within a single manufacturer datasheet.
Key Features
30V , 60A , RDS(ON)=12m Ω @VGS=10V. RDS(ON)=17mΩ @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 & TO-263 package. D
G
G
D
G S
CEB SERIES TO-263(DD-PAK)
G D S
CEP SERIES TO-220
S.
Note: The manufacturer provides a single datasheet file (CEB6031LS2_Chino-ExcelTechnology.pdf) that lists specifications for multiple related part numbers.
Datasheet Details
Part number
CEB6031LS2
Manufacturer
Chino-Excel Technology
File Size
52.33 KB
Description
N-Channel Logic Level Enhancement Mode Field Effect Transistor
Full PDF Text Transcription for CEB6031LS2 (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
CEB6031LS2. For precise diagrams, and layout, please refer to the original PDF.
CEP6031LS2/CEB6031LS2 March 1998 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES 30V , 60A , RDS(ON)=12m Ω @VGS=10V. RDS(ON)=17mΩ @VGS=4.5V. Super...
View more extracted text
URES 30V , 60A , RDS(ON)=12m Ω @VGS=10V. RDS(ON)=17mΩ @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 & TO-263 package. D G G D G S CEB SERIES TO-263(DD-PAK) G D S CEP SERIES TO-220 S ABSOLUTE MAXIMUM RATINGS (TC=25 C unless otherwise noted) Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage VGS Drain Current-Continuous @TJ=125 C -Pulsed ID IDM Drain-Source Diode Forward Current IS Maximum Power Dissipation @Tc=25 C Derate above 25 C PD 15 Operating and StorageTemperature Range TJ, TSTG Limit 30 Ć 20 60 180 60 50 0.
CEB6031LS2 Datasheet
