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CP337V - Small Signal Transistor

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PROCESS CP337V Small Signal Transistor NPN - Saturated Switch Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY EPITAXIAL PLANAR 29 x 29 MILS 7.1 MILS 11.8 x 4.5 MILS 11.8 x 4.5 MILS Al - 30,000Å Au-As - 13,000Å GROSS DIE PER 4 INCH WAFER 13,192 PRINCIPAL DEVICE TYPES 2N3725A 2N4014 w w w. c e n t r a l s e m i . c o m R2 (29-June 2011) PROCESS CP337V Typical Electrical Characteristics w w w. c e n t r a l s e m i . c o m R2 (29-June 2011) BARE DIE PACKING OPTIONS BARE DIE IN TRAY (WAFFLE) PACK CT: Singulated die in tray (waffle) pack.
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