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Bt261
30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller
The Bt261 HSYNC Line Lock Controller is designed specifically for image capture applications. Either composite video or TTL composite sync information is input via VIDEO. An internal sync separator separates horizontal and vertical sync information. Programmable horizontal and vertical video timing enables recovery of both standard and nonstandard timing information. An external VCO may be used in conjunction with the on-chip phase comparator for implementation of clocks locked to the horizontal frequency. Alternately, a high-speed clock (OSC) may be divided down to generate the pixel clock. The phase of the generated pixel clock is adjusted to align with the noise-gated CSYNC.
BT261 Datasheet
