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AZP94 Datasheet Clock Generation Chip

Manufacturer: Arizona Microtek

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Datasheet Details

Part number AZP94
Manufacturer Arizona Microtek
File Size 167.13 KB
Description Clock Generation Chip
Datasheet download datasheet AZP94 Datasheet

General Description

The AZP94 is a specialized ÷1 or ÷2 clock generation part including an enable/reset function.

The divide ratio is selected with the DIV-SEL pin/pad.

When DIV-SEL is open (NC), the AZP94 functions as a standard receiver.

Overview

www.DataSheet4U.com ARIZONA MICROTEK, INC.

AZP94 ECL/PECL ÷1, ÷2 Clock Generation Chip with Tristate Compatible.

Key Features

  • Green and RoHS Compliant / Lead (Pb) Free Package Available 3.0V to 5.5V Operation Selectable Divide Ratio Selectable Enable Polarity and Threshold (CMOS/TTL or PECL) Tristate Compatible Outputs Input Buffer Powers Down when Disabled Selectable Input Biasing High Bandwidth for ≥1GHz Available in a MLP 8 (2x2) Package IBIS Model File Available on Arizona Microtek Website.

More Datasheets from Arizona Microtek

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AZP92 Clock Generation Chip
AZP96 ECL/PECL Differential Receiver