Datasheet Details
| Part number | AD9528 |
|---|---|
| Manufacturer | Analog Devices |
| File Size | 1.97 MB |
| Description | JESD204B/JESD204C Clock Generator |
| Datasheet |
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| Part number | AD9528 |
|---|---|
| Manufacturer | Analog Devices |
| File Size | 1.97 MB |
| Description | JESD204B/JESD204C Clock Generator |
| Datasheet |
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The AD9528 is a two-stage PLL with an integrated JESD204B/ JESD204C SYSREF generator for multiple device synchronization.
The first stage phase-locked loop (PLL) (PLL1) provides input reference conditioning by reducing the jitter present on a system clock.
The second stage PLL (PLL2) provides high frequen
Data Sheet AD9528 JESD204B/JESD204C Clock Generator with 14 LVDS/HSTL.
| Part Number | Description |
|---|---|
| AD9520-0 | 12 LVPECL/24 CMOS Output Clock Generator |
| AD9520-1 | 12 LVPECL/24 CMOS Output Clock Generator |
| AD9520-2 | 12 LVPECL/24 CMOS Output Clock Generator |
| AD9520-3 | 12 LVPECL/24 CMOS Output Clock Generator |
| AD9520-4 | 12 LVPECL/24 CMOS Output Clock Generator |
| AD9520-5 | 12 LVPECL/24 CMOS Output Clock Generator |
| AD9522-0 | 12 LVDS/24 CMOS Output Clock Generator |
| AD9522-1 | 12 LVDS/24 CMOS Output Clock Generator |
| AD9522-2 | 12 LVDS/24 CMOS Output Clock Generator |
| AD9522-3 | 12 LVDS/24 CMOS Output Clock Generator |