Download the A40MX04 datasheet PDF.
This datasheet also includes the A40 variant, as both parts are published together in a single manufacturer document.
v5.0 40MX and 42MX FPGA Families
Fe a t ur es
High C apaci t y • • • • • • • • • • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.
Key Features
such as IEEE Standard 1149.1 (JTAG) Boudary Scan Testing, dual-port SRAM, and fast wide-decode modules. The A42MX36 device offers dual-port SRAM for implementing fast FIFOs, LIFOs, and temporary data storage. The large number of storage elements can efficiently address.
