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Features
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Utilizes the AVR ® Enhanced RISC Architecture AVR - High Performance and Low Power RISC Architecture 118 Powerful Instructions - Most Single Clock Cycle Execution 2K bytes of In-System Programmable ISP Flash – SPI Serial Interface for In-System Programming – Endurance: 1,000 Write/Erase Cycles 128 bytes EEPROM – Endurance: 100,000 Write/Erase Cycles 128 bytes Internal RAM 32 x 8 General Purpose Working Registers – 3 AT90S/LS2323 Programmable I/O Lines – 5 AT90S/LS2343 Programmable I/O Lines VCC: 4.0 - 6.0V AT90S2323/AT90S2343 VCC: 2.7 - 6.
90S2343 Datasheet
