A48P3616B Datasheet 8M x 16-Bit DDR DRAM

Manufacturer: AMIC

A48P3616B 8m x 16-bit ddr dram by AMIC - Datasheet Preview

Datasheet Details

Part number	A48P3616B
Manufacturer	AMIC
File Size	1.45 MB
Description	8M x 16-Bit DDR DRAM
Download	A48P3616B Download (PDF)

General Description

The 128Mb DDR SDRAM uses a double-data-rate architecture to achieve high-speed operation.

The double data rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins.

A single read or write access for the 128Mb DDR SDRAM effectively consists of a single 2nbit wide, one clock cycle data transfer at the internal DRAM core and two corresponding n-bit wide, one-half-clock-cycle data transfers at the I/O pins.

Overview

Document Title 8M X 16 Bit DDR DRAM Revision History Rev.

No.

History 1.0 Initial issue A48P3616B 8M X 16 Bit DDR DRAM Issue Date January 2, 2014 Remark Final (January, 2014, Version 1.0) AMIC Technology, Corp.

Key Features

CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operating Frequency (MHz) DDR400 (5) 133 166 200.
Double data rate architecture: two data transfers per clock cycle.
Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver.
DQS is edge-aligned with data for reads and is centeraligned with data for writes.
Differential clock inputs (CK and CK ).
Four internal banks for concurrent op.

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Brand Logo	Part Number	Description	Manufacturer
	A48P3616	8M X 16 Bit DDR DRAM	AMIC Technology

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